1. Field of the Invention
This invention relates to semiconductor device packages. More particularly, this invention relates to lead frame based semiconductor device packages and methods for manufacturing lead frame based semiconductor device packages.
2. Description of the Related Art
In lead frame based semiconductor device packages, electrical signals are transmitted between at least one semiconductor device (die) and external circuitry, such as a printed circuit board, by an electrically conductive lead frame. The lead frame includes a number of leads, each having an inner lead end and an opposing outer lead end. The inner lead end is electrically connected to input/output (I/O) pads on the die, and the outer lead end provides a terminal outside of the package body. Where the outer lead end terminates at the face of the package body, the package is known as a “no-lead” package, while if the outer leads extend beyond the package body perimeter the package is referred to as “leaded”. Examples of well-known no-lead packages include quad flat no-lead (QFN) packages, which have four sets of leads disposed around the perimeter of the bottom of a square package body, and dual flat no-lead (DFN) packages, which have two sets of leads disposed along opposite sides of the bottom of a package body. A method for the manufacture of a QFN package is disclosed in commonly owned published United States patent application publication number US 2003/0203539 A1 that was filed on Apr. 29, 2002 and is incorporated by reference in its entirety herein.
Connection of the die to the inner lead ends is typically performed using wire bonding, tape automated bonding (TAB), or flip-chip methods. In wirebonding or TAB methods, the inner lead ends terminate a distance from the die and are electrically interconnected to I/O pads on the top of the die by small diameter wires or conductive tape. The die may be supported by a support pad, which is surrounded by the leads. In the flip-chip method, the inner lead ends of the lead-frame extended beneath the die, and the die is flipped such that the I/O pads on the die contact the inner lead ends through a direct electrical connection (e.g., a solder connection).
In no-lead packages employing wirebonding, the leads are typically formed in one of two general configurations. In a first configuration, shown in FIG. 1, each lead 10 consists substantially of a post disposed proximate a side face of the package. A support pad 12 is typically disposed between the leads 10 for supporting a die 14. The leads 10 and support pad 12 may include locking features, such as tabs 16 protruding outward from the lead 10 and support pad 12, which cooperate with a molding compound to retain the lead 10 and support pad 12 within the package. One drawback to this configuration is that it requires a relatively long length of bond wire 18 to connect I/O pads on the die 14 to the leads 10. The use of longer lengths of bond wire 18 adversely affects package performance by increasing the electrical resistance between the die 14 and the lead 10. Also, the bond wire 18 is relatively expensive and fragile and, therefore, the use of greater amounts of bond wire 18 is undesirable. This problem is exacerbated by the industry trend toward the use of smaller and smaller die sizes for the same size package, which increases the length of bond wire 18 for a given package size.
In a second general configuration for wirebonded, no-lead packages, shown in FIG. 2, the lead 10 includes an interposer 20, which extends from the board connecting post toward the die support pad 12. The interposer 20 reduces the length of bond wire 18 needed, thus overcoming some of the problems of the configuration of FIG. 1. However, the configuration of FIG. 2 is itself problematic in that it is difficult to maintain the coplanarity of the bond sites on the interposer 20 when bonding the die to the leads.
No-lead packages employing flip-chip bonding methods typically use a configuration similar to that shown in FIG. 2 without the support pad 12. The interposers 20 extend beneath the die 14, and the die is flipped such that I/O pads on the die 14 can be soldered to the bond sites on the interposers 20. The use of this configuration for flip-chip bonding methods also presents the problem of maintaining coplanarity of the bond sites on the interposers 20 when bonding the die 14 to the leads 10.
Where wirebonding is used, the bond wires 18 are typically attached using one of three wirebonding techniques: ultrasonic bonding, thermocompression bonding, and thermosonic bonding.
In ultrasonic bonding, a combination of pressure and ultrasonic vibration bursts are applied to form a metallurgical cold weld. Ultrasonic bonding forms what is known as a “wedge bond”. In a wedge bond, the bond occurs along a side surface of the wire 18, with the wire 18 extending generally parallel to a surface of the lead 10, as shown at 19 in FIG. 2.
In thermocompression bonding, a combination of pressure and elevated temperature are applied to form a weld. Thermosonic bonding, on the other hand, uses a combination of pressure, elevated temperature, and ultrasonic vibration bursts are applied to form a weld. Thermocompression and thermosonic bonding techniques typically form what is known as a “ball bond” at the I/O pad and a wedge bond at the lead 10. In a ball bond, the bond occurs at the end of the wire 18, with the wire 18 extending generally perpendicular to the surface of the I/O pad at the connection site, as shown at 21 in FIG. 2. Practically all thermocompression and thermosonic bonding is performed using gold or gold alloy wire.
In modern packaging techniques, a matrix of interconnected lead frames is used to allow a number of packages to be manufactured at the same time. Such techniques generally include securing a die 14 to the central support pad 12 of each lead frame in the matrix using solder, epoxy, double-sided adhesive tape, and the like. The leads 10 for each lead frame are then wirebonded to I/O pads on the associated die 14. After wirebonding, the die 14, bond wires 18, and at least a portion of the leads 10 are encapsulated in plastic using, for example, a transfer or injection molding process. The packages are then singulated by sawing with a blade, water jet, or the like, leaving portions of the leads 1 0 of each package exposed for electrical connection to an external circuit.
The use of ultrasonic bonding in such modern encapsulation techniques is problematic for a number of reasons. For example, the leads 10 formed on modern lead frames are very thin and are therefore easily broken by the aluminum wedge bonding process. As a result of such limitations, the use of aluminum wedge bonding has been reserved for individualized, hermetic packages, which provide solid bonding posts and where the package can be precisely rotated and positioned during the aluminum wedge bonding process.